From e2638b70e78a5d9455951cc10ef98e01a33081af Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Zeng=20wei=20=28=E6=9B=BE=E5=A8=81=29?= Date: Wed, 6 Mar 2024 16:52:18 +0800 Subject: [PATCH] =?UTF-8?q?=E5=8A=A0=E7=83=AD=E5=99=A8pi=E6=B5=8B=E8=AF=95?= =?UTF-8?q?=EF=BC=8C4=E5=BA=A6?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- HARDWARE/PID.c | 13 ------- HARDWARE/rs485.c | 2 +- .../control_STM32F103C8_1.0.0.dbgconf | 36 +++++++++++++++++++ 3 files changed, 37 insertions(+), 14 deletions(-) create mode 100644 USER/DebugConfig/control_STM32F103C8_1.0.0.dbgconf diff --git a/HARDWARE/PID.c b/HARDWARE/PID.c index a59f28f..efb033b 100644 --- a/HARDWARE/PID.c +++ b/HARDWARE/PID.c @@ -88,23 +88,10 @@ int calc_p(float t_t, float t_c, float error, int p_b, float pid_p, float pid_i) return 0; } return p; - // int p_b = 52; - // if (t_t - t_c > 5) { - // return 100; - // } - // if (t_t - t_c < 5 && t_t > t_c) { - // return p_b + (t_t - t_c) * (100 - p_b) / 5; - // } - // if (t_t <= t_c) { - // return p_b; - // } - // return 0; - } void PID_Calc() // pid calc { - pid.set_tem = 25; pid.Kp = 19.2; pid.Ki = 0.02; int p_base = 52; diff --git a/HARDWARE/rs485.c b/HARDWARE/rs485.c index 17c5454..fbcbc52 100644 --- a/HARDWARE/rs485.c +++ b/HARDWARE/rs485.c @@ -383,9 +383,9 @@ void RS485_1_Send_Data_2(void) sendbuf[0] = 0xEE; sendbuf[1] = 0xB5; sendbuf[2] = 0x05; + sendbuf[37] = 0xFF; sendbuf[38] = 0xFC; - sendbuf[39] = 0xFF; sendbuf[40] = 0xFF; // u8 a; diff --git a/USER/DebugConfig/control_STM32F103C8_1.0.0.dbgconf b/USER/DebugConfig/control_STM32F103C8_1.0.0.dbgconf new file mode 100644 index 0000000..66e10b6 --- /dev/null +++ b/USER/DebugConfig/control_STM32F103C8_1.0.0.dbgconf @@ -0,0 +1,36 @@ +// File: STM32F101_102_103_105_107.dbgconf +// Version: 1.0.0 +// Note: refer to STM32F101xx STM32F102xx STM32F103xx STM32F105xx STM32F107xx Reference manual (RM0008) +// STM32F101xx STM32F102xx STM32F103xx STM32F105xx STM32F107xx datasheets + +// <<< Use Configuration Wizard in Context Menu >>> + +// Debug MCU configuration register (DBGMCU_CR) +// Reserved bits must be kept at reset value +// DBG_TIM11_STOP TIM11 counter stopped when core is halted +// DBG_TIM10_STOP TIM10 counter stopped when core is halted +// DBG_TIM9_STOP TIM9 counter stopped when core is halted +// DBG_TIM14_STOP TIM14 counter stopped when core is halted +// DBG_TIM13_STOP TIM13 counter stopped when core is halted +// DBG_TIM12_STOP TIM12 counter stopped when core is halted +// DBG_CAN2_STOP Debug CAN2 stopped when core is halted +// DBG_TIM7_STOP TIM7 counter stopped when core is halted +// DBG_TIM6_STOP TIM6 counter stopped when core is halted +// DBG_TIM5_STOP TIM5 counter stopped when core is halted +// DBG_TIM8_STOP TIM8 counter stopped when core is halted +// DBG_I2C2_SMBUS_TIMEOUT SMBUS timeout mode stopped when core is halted +// DBG_I2C1_SMBUS_TIMEOUT SMBUS timeout mode stopped when core is halted +// DBG_CAN1_STOP Debug CAN1 stopped when Core is halted +// DBG_TIM4_STOP TIM4 counter stopped when core is halted +// DBG_TIM3_STOP TIM3 counter stopped when core is halted +// DBG_TIM2_STOP TIM2 counter stopped when core is halted +// DBG_TIM1_STOP TIM1 counter stopped when core is halted +// DBG_WWDG_STOP Debug window watchdog stopped when core is halted +// DBG_IWDG_STOP Debug independent watchdog stopped when core is halted +// DBG_STANDBY Debug standby mode +// DBG_STOP Debug stop mode +// DBG_SLEEP Debug sleep mode +// +DbgMCU_CR = 0x00000007; + +// <<< end of configuration section >>>